NXP Semiconductors /QN908XC /BLEDP /DP_TEST_CTRL

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Interpret as DP_TEST_CTRL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0TIF_SEL0TIF_CLK_SEL 0 (CORDIC_DAC_OUT)CORDIC_DAC_OUT 0 (TIF_EN)TIF_EN 0 (IMR_INV)IMR_INV 0 (CLK_TX_GATE_DIS)CLK_TX_GATE_DIS 0 (BUF_FULL_OFFRF_DIS)BUF_FULL_OFFRF_DIS 0 (CLK_BUST_GATE_DIS)CLK_BUST_GATE_DIS 0 (CLK_RX_GATE_DIS)CLK_RX_GATE_DIS 0 (CLK_LPDET_GATE_DIS)CLK_LPDET_GATE_DIS 0 (CLK_HPDET_GATE_DIS)CLK_HPDET_GATE_DIS 0 (CLK_RFE_GATE_DIS)CLK_RFE_GATE_DIS 0 (IQSWAP_XOR)IQSWAP_XOR 0 (DAC_TEST_EN)DAC_TEST_EN 0DAC_TEST

Description

datapath test iinterface register

Fields

TIF_SEL

test interface selection.

TIF_CLK_SEL

test interface clock selection

CORDIC_DAC_OUT

when high cordic to dac

TIF_EN

test interface enable

IMR_INV

datapath mixer nco if selection

CLK_TX_GATE_DIS

clock tx gate disable

BUF_FULL_OFFRF_DIS

(new standard)______when high rf always on in rx_en other wise when buffer full rf will be off.

CLK_BUST_GATE_DIS

clock burst gate disable

CLK_RX_GATE_DIS

clock rx gate disable

CLK_LPDET_GATE_DIS

clock lp mode detector gate disable

CLK_HPDET_GATE_DIS

clock hp mode detector gate disable

CLK_RFE_GATE_DIS

clock rfe gate disable

IQSWAP_XOR

iq swap xor.

DAC_TEST_EN

dac test enable dac input comes from register

DAC_TEST

dac input data value

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